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2014-02-16T03:08:57Z

Новая страница: «== Описание доступных ресурсов ПЛИС == Файл:S3BOARD-top-400.gif|frame|right|Рисунок 1 — [http://www.digilentinc.com/P…»

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== Описание доступных ресурсов ПЛИС ==

[[Файл:S3BOARD-top-400.gif|frame|right|Рисунок 1 — [http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,799&Prod=S3BOARD Spartan-3 Starter Kit] ]]

[[Файл:S3BOARD-block-400.gif|frame|right|Рисунок 2 — [http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,799&Prod=S3BOARD Spartan-3 Starter Kit] ]]

На рисунке 1 представлен внешний вид отладочной платы [http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,799&Prod=S3BOARD Spartan-3 Starter Kit], включающей ПЛИС фирмы Xilinx Spartan-3 ([http://www.chipfind.ru/datasheet/pdf/xilinx/xc3s1xxx.pdf документация по микросхеме XC3S1000]). В таблице 1 представлены основные параметры, характеризующие ПЛИС XC3S1000. На рисунке 2 показаны основные компоненты и интерфейсы размещённые на отладочной плате:
* генератор синхросигнала на 50 МГц;
* вход внешней синхронизации;
* внешняя память инициализации ПЛИС (Flash PROM XCF04S)
* внешнее ОЗУ (512К × 16 бит)
* три 40-выводных разъёма, на которые выведены пользовательские выводы ПЛИС
* полоска из 8 светодиодов
* четыре семисегментных индикатора
* 4 кнопки
* 8 переключателей
* порты
** PS/2
** VGA
** RS232 (COM-порт)

{| align=center cellspacing="0" cellpadding="5" border="1"
|+ Таблица 1 – Параметры ПЛИС XC3S1000
!rowspan=2| Device
!rowspan=2| System <br /> Gates
!rowspan=2| Logic <br /> Cells
!colspan=3| CLB Array (One CLB = Four Slices)
!rowspan=2| Distributed <br /> RAM (bits1)
!rowspan=2| Block RAM <br /> (bits 1)
!rowspan=2| Dedicated <br /> Multipliers
!rowspan=2| DCMs
!rowspan=2| Maximum <br /> User I/O
!rowspan=2| Maximum <br />Differential <br /> I/O Pairs
|-
! Rows || Columns || Total CLBs
|-
! XC3S1000
| 1M
| 17,280
| 48
| 40
| 1,920
| 120K
| 432K
| 24
| 4
| 391
| 175
|}

=== Описание интерфейса блока верхнего уровня (TOP-модуль) ===

{|
| <div style="border: 2px solid #AEA; padding: 0.4em; border-bottom: none; border-right: none; background: HoneyDew">
'''Листинг 1''' — VHDL-описание компонента верхнего уровня ([{{SERVER}}/ftp/files/pcusb/lab04/top.vhd top.vhd])
----
<big><source lang="vhdl">
library ieee;
use ieee.std_logic_1164.all;

entity top is
port(
CLK : in std_logic; -- синхросигнал 50 МГц (T9)
BTN : in std_logic_vector(3 downto 0); -- кнопки (L14 L13 M14 M13)
SW : in std_logic_vector(7 downto 0); -- переключатели (K13 K14 J13 J14 H13 H14 G12 F12)
-- полоска светодиодов
LED : out std_logic_vector(7 downto 0); -- P11 P12 N12 P13 N14 L12 P14 K12
-- семисегментный индикатор
SEG : out std_logic_vector(7 downto 0); -- P16 N16 F13 R16 P15 N15 G13 E14
AN : out std_logic_vector(3 downto 0); -- E13 F14 G14 D14
-- выводы интерфейса RS232
RXD : in std_logic_vector(1 downto 0); -- N10 T13
TXD : out std_logic_vector(1 downto 0); -- T14 R13
-- выводы интерфейса VGA
GRB : out std_logic_vector(2 downto 0); -- T12 R12 R11
VH : out std_logic_vector(1 downto 0); -- T10 R9
-- выводы интерфейса PS2
PS2 : inout std_logic_vector(1 downto 0); -- M16 M15
-- выводы подключения внешнего ОЗУ
ADDR : out std_logic_vector(17 downto 0); -- L3 K5 K3 J3 J4 H4 H3 G5 E4 E3 F4 F3 G4 L4 M3 M4 N3 L5
DATA : inout std_logic_vector(31 downto 0); -- N1 M1 K2 C3 F5 G1 E2 D2 D1 E1 G2 J1 K1 M2 N2 P2 R1 P1
-- L2 J2 H1 F2 P8 D3 B1 C1 C2 R5 T5 R6 T8 N7
CE : out std_logic_vector(1 downto 0); -- N5 P7
OE : out std_logic; -- K4
WE : out std_logic; -- G3
BSEL : out std_logic_vector(3 downto 0)); -- R4 P5 T4 P6
end;

architecture beh of top is
begin
-- отключение неиспользуемых выводов
ADDR <= "000000000000000000";
DATA <= "ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZ";
CE <= "11";
OE <= '1';
WE <= '1';
BSEL <= x"0";

TXD <= "11";
PS2 <= "ZZ";

GRB <= "000";
VH <= "00";

LED <= x"00";
SEG <= x"00";
AN <= x"F";

end architecture beh;
</source>
</big>
</div>
|}

{| width=500px
|{{Hider|Листинг файла конфигурации выводов ПЛИС (([{{SERVER}}/ftp/files/pcusb/lab04/top.ucf top.ucf]))}}
{{Файл|top.ucf|<big><source lang="text">
NET "CLK" LOC = "T9" | IOSTANDARD = LVCMOS33 ;

NET "SEG(0)" LOC = "E14" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "SEG(1)" LOC = "G13" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "SEG(2)" LOC = "N15" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "SEG(3)" LOC = "P15" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "SEG(4)" LOC = "R16" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "SEG(5)" LOC = "F13" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "SEG(6)" LOC = "N16" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "SEG(7)" LOC = "P16" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;

NET "AN(3)" LOC = "E13" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
NET "AN(2)" LOC = "F14" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
NET "AN(1)" LOC = "G14" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
NET "AN(0)" LOC = "D14" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;

NET "LED(7)" LOC = "P11" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "LED(6)" LOC = "P12" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "LED(5)" LOC = "N12" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "LED(4)" LOC = "P13" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "LED(3)" LOC = "N14" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "LED(2)" LOC = "L12" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "LED(1)" LOC = "P14" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;
NET "LED(0)" LOC = "K12" | IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = SLOW ;

NET "RXD(0)" LOC = "T13" | IOSTANDARD = LVCMOS33 ;
NET "TXD(0)" LOC = "R13" | IOSTANDARD = LVCMOS33 | DRIVE = 2 | SLEW = SLOW ;
NET "RXD(1)" LOC = "N10" | IOSTANDARD = LVCMOS33 ;
NET "TXD(1)" LOC = "T14" | IOSTANDARD = LVCMOS33 | DRIVE = 2 | SLEW = SLOW ;

NET "PS2(0)" LOC = "M15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "PS2(1)" LOC = "M16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;

NET "BTN(3)" LOC = "L14" | IOSTANDARD = LVCMOS33 ;
NET "BTN(2)" LOC = "L13" | IOSTANDARD = LVCMOS33 ;
NET "BTN(1)" LOC = "M14" | IOSTANDARD = LVCMOS33 ;
NET "BTN(0)" LOC = "M13" | IOSTANDARD = LVCMOS33 ;

NET "SW(7)" LOC = "K13" | IOSTANDARD = LVCMOS33 ;
NET "SW(6)" LOC = "K14" | IOSTANDARD = LVCMOS33 ;
NET "SW(5)" LOC = "J13" | IOSTANDARD = LVCMOS33 ;
NET "SW(4)" LOC = "J14" | IOSTANDARD = LVCMOS33 ;
NET "SW(3)" LOC = "H13" | IOSTANDARD = LVCMOS33 ;
NET "SW(2)" LOC = "H14" | IOSTANDARD = LVCMOS33 ;
NET "SW(1)" LOC = "G12" | IOSTANDARD = LVCMOS33 ;
NET "SW(0)" LOC = "F12" | IOSTANDARD = LVCMOS33 ;

NET "GRB(0)" LOC = "R11" | IOSTANDARD = LVCMOS33 | DRIVE = 24 | SLEW = FAST ;
NET "GRB(1)" LOC = "R12" | IOSTANDARD = LVCMOS33 | DRIVE = 24 | SLEW = FAST ;
NET "GRB(2)" LOC = "T12" | IOSTANDARD = LVCMOS33 | DRIVE = 24 | SLEW = FAST ;
NET "VH(0)" LOC = "R9" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
NET "VH(1)" LOC = "T10" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;

NET "ADDR(17)" LOC = "L3" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(16)" LOC = "K5" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(15)" LOC = "K3" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(14)" LOC = "J3" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(13)" LOC = "J4" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(12)" LOC = "H4" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(11)" LOC = "H3" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(10)" LOC = "G5" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(9)" LOC = "E4" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(8)" LOC = "E3" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(7)" LOC = "F4" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(6)" LOC = "F3" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(5)" LOC = "G4" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(4)" LOC = "L4" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(3)" LOC = "M3" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(2)" LOC = "M4" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(1)" LOC = "N3" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "ADDR(0)" LOC = "L5" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;

NET "OE" LOC = "K4" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;
NET "WE" LOC = "G3" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = FAST ;

NET "DATA(15)" LOC = "R1" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(14)" LOC = "P1" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(13)" LOC = "L2" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(12)" LOC = "J2" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(11)" LOC = "H1" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(10)" LOC = "F2" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(9)" LOC = "P8" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(8)" LOC = "D3" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(7)" LOC = "B1" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(6)" LOC = "C1" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(5)" LOC = "C2" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(4)" LOC = "R5" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(3)" LOC = "T5" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(2)" LOC = "R6" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(1)" LOC = "T8" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(0)" LOC = "N7" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;

NET "CE(0)" LOC = "P7" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST ;
NET "BSEL(1)" LOC = "T4" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST ;
NET "BSEL(0)" LOC = "P6" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST ;

NET "DATA(31)" LOC = "N1" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(30)" LOC = "M1" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(29)" LOC = "K2" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(28)" LOC = "C3" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(27)" LOC = "F5" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(26)" LOC = "G1" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(25)" LOC = "E2" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(24)" LOC = "D2" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(23)" LOC = "D1" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(22)" LOC = "E1" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(21)" LOC = "G2" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(20)" LOC = "J1" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(19)" LOC = "K1" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(18)" LOC = "M2" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(17)" LOC = "N2" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;
NET "DATA(16)" LOC = "P2" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST | PULLUP ;

NET "CE(1)" LOC = "N5" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST ;
NET "BSEL(3)" LOC = "R4" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST ;
NET "BSEL(2)" LOC = "P5" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = FAST ;
</source></big>}}{{Hider|end}}
|}

[[Категория:FPGA]]

Spartan-3 Starter Kit - История изменений

ANA: Новая страница: «== Описание доступных ресурсов ПЛИС == Файл:S3BOARD-top-400.gif|frame|right|Рисунок 1 — [http://www.digilentinc.com/P…»