Co-Simulation/Литература — различия между версиями

Версия 19:58, 27 ноября 2013

• FT2232H - Hi-Speed Dual USB UART/FIFO IC
• полностью переведенный даташит FT2232H - Hi-Speed Dual USB UART/FIFO IC
• [1]

Ссылки

• http://www.bluespec.com/products/index.htm Bluespec Core Technology
  • http://csg.csail.mit.edu/6.S078/6_S078_2012_www/resources/bsv_by_example.pdf BSV by Example book
  • https://sites.google.com/a/bluespec.com/learning-bluespec/Home/BSV-Documentation BSV-Documentation
  • http://www.bluespec.com/emulationinfrastructure/emulationinfrastructure.html Emulation Infrastructure

• http://www.marcopolofpga.co.kr/html/01main_sub01.php?idx=12&PHPSESSID=b096164b3f02ddb0890df0559116f091 MECS ( MarcoPolo co- Emulation System )

• http://www.xess.com/appnotes/xst3_video.php

• SCE-MI (Standard Co-Emulation Modeling Interface)
  • http://www.accellera.org/downloads/standards/sce-mi Download SCE-MI (Standard Co-Emulation Modeling Interface)
  • Standard Co-Emulation Modeling Interface, Release 2.1 (2011-01-21)
  • sce-mi-20-standard (вебинар verificationacademy)

• Готовые решения:
  • Aldec's HES™ Hardware Emulation Solutions
  • alatek
    • Alatek Inc. Announces New LINUX Hardware Accelerator Speeds HDL Simulators
    • Alatek Boosts Performance of Mentor Graphics® HDL Simulators By 100x

  Hardware Embedded Simulation (HES) includes the first year of software maintenance in the purchase price. HES products supporting 2 million FPGA gates start at $125,000. Various hardware configurations are available, and boards that support up to 6 million FPGA gates will be available in 4thQTR of 2001.

  • • Hardware Embedded Simulation™ (На русском)
  • Rapid Prototyping Platform (cadence)
  • Cadence Palladium XP
  • EVE Zebu
  • Mentor Veloce
  • Synopsys Confirma
• OpenIDEA
  • ASIC Development Test Platform with Virtex-7 FPGA By Inrevium™
• Новости
  • Aldec Adds ARM Cortex-A9 Support to HES-7 ASIC Prototyping Platform

• Другое
  • Моделирование HDL-проектов на мультипроцессорной системе